Enabling and Exploiting Partition-Level Parallelism (PALP) in Phase Change Memories

Exploiting instruction- and data-level parallelism

istorically, computer architects have taken two different approaches to high-performance computing: instruction level parallelism and data-level par-allelism. The ILP paradigm seeks to execute several instructions each cycle. It does this by exploring a sequential instruction stream and extracting independent instructions to send to several execution units in parallel. The DLP paradigm, on the ...

Understanding and exploiting control–level parallelism

Exploiting Task-Level Parallelism Using pTask

This paper presents pTask— a system that allows users to automatically exploit dynamic task-level parallelism in sequential array-based C programs. The system employs compiler analysis to extract data usage information from the program, then uses this information at run-time to dynamically exploit concurrency and to enforce data-dependences. Experimental results using a prototype of the system ...

Warp-Level Parallelism: Enabling Multiple Replications In Parallel on GPU

Stochastic simulations need multiple replications in order to build confidence intervals for their results. Even if we do not need a large amount of replications, it is a good practice to speed-up the whole simulation time using the Multiple Replications In Parallel (MRIP) approach. This approach usually supposes to have access to a parallel computer such as a symmetric multiprocessing machine ...

Exploiting Loop Level Parallelism in Nonprocedural Dataflow Programs

In this paper, we discuss how loop level parallelism is detected in a nonprocedural dataflow program and how a procedural program with concurrent loops is scheduled. In addition, we discuss a program restructuring technique which may be applied to recursive equations so that concurrent loops may be generated for a seemingly iterative computation. A compiler which generates C code for the langua...